Technical Field
The present invention relates to a flat display apparatus, a control circuit and a control method employed therein, especially a flat display apparatus using different signals to drive horizontal scanning lines of the flat display device, a control circuit and a control method for controlling the flat display apparatus
Description of the Related Art
Flat display devices such as liquid crystal displays have been widely used in all kinds of electronic devices. With the extending demands of customers, sizes of display screen of the flat displays have developed from small size originally employed in portable computers to middle size employed in desktop computers, and then to large size employed in family cinema gradually. It is important to maintain a displaying uniformity of a whole screen with the increasing size of the display screen.
Following the increasing size of the display device, amount of display unit defined in the display device for displaying image called as pixel is also increasing. Even a refresh frequency of an image does not increase, a transition of voltage level of scanning signal must be faster to satisfy a displaying demand because of the increasing pixels. However, the faster transition of voltage level results in a feed-though effect of a capacitor generated by a capacitive coupling effect, which causes a stored voltage of the pixel changed. Therefore, the displaying uniformity is challenged in both horizontal and vertical directions.
Referring to FIG. 7, a block diagram of a typical liquid crystal display is shown. The liquid crystal display 10 includes a control circuit 100, a data driving module 110, a gate driving module 120, and a display panel 130. The control circuit 100 receives display data and all kinds of control data needed for displaying. The control circuit 100 transforms the display data and a part of the control data to first signals needed by the data driving module 110, and outputs the first signals to the data driving module 110. The control circuit 100 transforms the other part of the control data to second signals needed by the gate driving module 120 and outputs the second signals to the gate driving module 120. The data driving module 110 drives the data lines 112, 114 according to the received first signals, and the gate driving module 120 drives the scanning lines 122, 124 according to the received second signals. In the display panel 130, each pixel 132 denoted by a dotted frame is formed at the intersections of the data line 112, 114 and the scanning line 122, 124.
Referring to FIG. 8A and FIG. 8B, FIG. 8A is an equivalent circuit diagram of a pixel 132 of the liquid crystal display 10 in FIG. 7, and FIG. 8B is a signal wave diagram of a driving signal employed in the gate driving module 120 in FIG. 7 for driving the gate line 122. The pixel 132 includes a thin film transistor 200, a liquid crystal capacitor CLC, a storage capacitor CS, and a parasitic capacitor CGD. The gate electrode 200c of the thin film transistor 200 is electrically coupled to the scanning line 122. The source electrode 200a of the thin film transistor 200 is electrically coupled to the data line 114. The drain electrode 200b of the thin film transistor 200 is electrically coupled to a terminal of the liquid crystal capacitor CLC, a terminal of the storage capacitor CS, and a terminal of the parasitic capacitor CGD. The other terminal of the liquid crystal capacitor CLC and the other terminal of the storage capacitor CS are configured for receiving a common voltage VCOM. The other terminal of the parasitic capacitor CGD is electrically connected to the scanning line 122.
As shown in FIG. 8B, when the scanning signal is provided to the scanning line 122, after a low level voltage Vgl changes to reach a high level voltage Vgh via a rising edge RE, the thin film transistor 200 is turned on due to the high level voltage Vgh been provided to the gate electrode 200c. On the contrary, when the high level voltage Vgh changes to reach a low level voltage Vgl via a falling edge FE, the thin film transistor 200 is turned off due to the decreasing voltage provided to the gate electrode 200c. However, a fast transition of the voltage at the rising edge RE and the falling edge FE results in a capacitive coupling effect of the parasitic capacitor CGD between the gate 200c and drain electrodes 200b of the thin film transistor 200. Thus, a voltage maintain at the drain electrode 200b is changed to make a potential crossing the liquid crystal capacitor CLC deviated from a original pre-stored potential. A difference of the actual potential crossing the liquid crystal capacitor CLC and the original pre-stored potential is call as a feed-though voltage Vf.
If the feed-though voltages Vf in all the display panel 130 are same, a problem caused by the feed-though voltage Vf can easily be solved. However, in fact, the feed-though voltages Vf respectively corresponding to each pixel in all the display panel 130 are different. In the horizontal direction, the difference of the feed-though voltages Vf are mainly caused by a signal delay of the scanning lines which make an operation of turning off the thin film transistors 200 arranged in a same scanning line inconsistent. In the vertical direction, the difference of the feed-though voltages Vf are mainly caused by a voltage drop of a current and a resistance. When the gate high level voltage Vgh and the gate low level voltage Vgl are provided to the display panel 130, the wires layout made from different conducting lines, such as metal lines or thin film lines, generate voltage drop thereof. In any case, when signals transmit along the conducting lines (gate lines), a voltage difference (Vgh−Vgl) of the gate lines is gradually decreased with the signals been transmitted downward along the gate lines. The feed-through voltage Vf can be obtained according to following formula:
      V    f    =            (                        V          gh                -                  V          gl                    )        ⁢                  C        GD                              C          S                +                  C          LC                +                  C                      GD            ,            ON                              wherein CGD,ON is a parasitic capacitor of the conductive thin film transistor 200. That is, if the voltage difference (Vgh−Vgl) of the gate lines varies in the vertical direction, the feed-through voltage Vf is inevitably changes following the variation of the voltage difference.
To solve the above described problems, many solutions are provided. These solutions are all aimed at solving the uneven display generated by the feed-through effect of the scanning lines arranged in the horizontal direction. In fact, these solutions did achieve some improvement in a manner, such as U.S. Pat. No. 6,359,607, U.S. Pat. No. 6,867,760, U.S. Pat. No. 7,027,024 and U.S. published application No. 2006/0077163, et al. However, after experimental proof, these solutions can only solve a problem of uneven display in the horizontal direction and can not solve the uneven display in the vertical direction. The following chart 1 shows a plurality of voltage differences (Vgh−Vgl) at corresponding areas in a 40 inches LCD panel (it is assumed that the 40 inches LCD panel is divided into sixteen areas arranged as a 4×4 matrix) when normal signals are provided to the 40 inches LCD panel.
CHART 15.996.276.316.256.006.276.316.256.006.266.316.246.026.286.336.28
After employing the technology provided by the U.S. Pat. No. 6,359,607, the voltage differences (Vgh−Vgl) at corresponding areas of the same LCD panel are shown in Chart 2.
CHART 26.236.296.356.316.266.326.376.336.266.326.376.336.276.336.376.37
To sum up, after using the technology provided by the U.S. Pat. No. 6,359,607, the voltage differences (Vgh−Vgl) in the horizontal direction may be improved in a manner. However, the voltage differences (Vgh−Vgl) in the vertical direction is not only improved, but also become larger than that using original technology in a manner. In other words, after using the technology, the uniformity of displaying in the vertical direction becomes worse.